The HS3 builds on the successful JTAG-HS1 by adding an open-drain buffer to pin 14 allowing for the debugging of Xilinx Zynq-SOC processors. When connected to a PC via a standard A to micro-USB cable, the JTAG HS3 receives its power from USB and can be recognized as a Digilent programming cable, even if the HS3 is not attached to the target board. The JTAG bus can be shared with other devices as the HS3's signals are held in high-impedance, except when actively driven during programming. The HS3 is small and light, allowing it to be held firmly in place by the system board connector.